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DIAGRAMS
2004
Springer
14 years 2 months ago
Drawing Graphs in Euler Diagrams
We describe a method for drawing graph-enhanced Euler diagrams using a three stage method. The first stage is to lay out the underlying Euler diagram using a multicriteria optimizi...
Paul Mutton, Peter Rodgers, Jean Flower
CP
2006
Springer
14 years 14 days ago
Stochastic Allocation and Scheduling for Conditional Task Graphs in MPSoCs
This paper describes a complete and efficient solution to the stochastic allocation and scheduling for Multi-Processor System-on-Chip (MPSoC). Given a conditional task graph charac...
Michele Lombardi, Michela Milano
ICCAD
2006
IEEE
108views Hardware» more  ICCAD 2006»
14 years 5 months ago
Soft error reduction in combinational logic using gate resizing and flipflop selection
Soft errors in logic are emerging as a significant reliability problem for VLSI designs. This paper presents novel circuit optimization techniques to mitigate soft error rates (SE...
Rajeev R. Rao, David Blaauw, Dennis Sylvester
ICLP
1997
Springer
14 years 27 days ago
Automatic Termination Analysis of Logic Programs
Abstract This paper describes a general framework for automatic termination analysis of logic programs, where we understand by termination" the niteness of the LD-tree constru...
Naomi Lindenstrauss, Yehoshua Sagiv
CLIMA
2004
13 years 10 months ago
Weighted Multi Dimensional Logic Programs
Abstract. We introduce a logical framework suitable to formalize structures of epistemic agents. Such a framework is based on the notion of weighted directed acyclic graphs (WDAGs)...
Pierangelo Dell'Acqua