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CORR
2006
Springer
124views Education» more  CORR 2006»
15 years 4 months ago
Linear Encodings of Bounded LTL Model Checking
Abstract. We consider the problem of bounded model checking (BMC) for linear temporal logic (LTL). We present several efficient encodings that have size linear in the bound. Furthe...
Armin Biere, Keijo Heljanko, Tommi A. Junttila, Ti...
211
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CCS
2011
ACM
14 years 4 months ago
Eliminating the hypervisor attack surface for a more secure cloud
Cloud computing is quickly becoming the platform of choice for many web services. Virtualization is the key underlying technology enabling cloud providers to host services for a l...
Jakub Szefer, Eric Keller, Ruby B. Lee, Jennifer R...
ICCD
2004
IEEE
138views Hardware» more  ICCD 2004»
16 years 1 months ago
A Novel Low-Power Scan Design Technique Using Supply Gating
— Reduction in test power is important to improve battery life in portable devices employing periodic self-test, to increase reliability of testing and to reduce test-cost. In sc...
Swarup Bhunia, Hamid Mahmoodi-Meimand, Saibal Mukh...
FPGA
1997
ACM
127views FPGA» more  FPGA 1997»
15 years 8 months ago
General Modeling and Technology-Mapping Technique for LUT-Based FPGAs
We present a general approach to the FPGA technology mapping problem that applies to any logic block composed of lookup tables LUTs and can yield optimal solutions. The connecti...
Amit Chowdhary, John P. Hayes
EUSAI
2007
Springer
15 years 6 months ago
A Compiler for the Smart Space
Developing applications for smart spaces is a challenging task. Most programming systems narrowly focus on the embedded computer infrastructure and neglect the spatial aspect of th...
Urs Bischoff, Gerd Kortuem