1410 search results - page 81 / 282 » A Logic for Virtual Memory |
172
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ISCA
2012
IEEE
13 years 6 months ago
2012
IEEE
When multiple processor (CPU) cores and a GPU integrated together on the same chip share the off-chip main memory, requests from the GPU can heavily interfere with requests from t...
140
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DSN
2002
IEEE
15 years 9 months ago
2002
IEEE
This paper examines the effect of technology scaling and microarchitectural trends on the rate of soft errors in CMOS memory and logic circuits. We describe and validate an end-to...
125
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HIPEAC
2009
Springer
15 years 8 months ago
2009
Springer
Abstract. Exposing more instruction-level parallelism in out-of-order superscalar processors requires increasing the number of dynamic in-flight instructions. However, large instru...
140
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SP
2009
IEEE
15 years 10 months ago
2009
IEEE
We present a logic for reasoning about properties of secure systems. The logic is built around a concurrent programming language with constructs for modeling machines with shared ...
129
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TACAS
2007
Springer
15 years 10 months ago
2007
Springer
This paper presents a mechanised Hoare-style programming logic framework for assembly level programs. The framework has been designed to fit on top of operational semantics of rea...