2911 search results - page 561 / 583 » A Logic of Graph Constraints |
DFT
2006
IEEE
14 years 5 months ago
2006
IEEE
1 High temperature has become a major problem for system-on-chip testing. In order to reduce the test time while keeping the temperature of the chip under test within a safe range,...
IPPS
2006
IEEE
14 years 5 months ago
2006
IEEE
This paper presents a technique for memory optimization for a class of computations that arises in the field of correlated electronic structure methods such as coupled cluster and...
CASES
2006
ACM
14 years 4 months ago
2006
ACM
Architectural advances of modern systems has often been at odds with control complexity, requiring significant effort in both design and verification. This is particularly true ...
PODC
2006
ACM
14 years 4 months ago
2006
ACM
A quorum system over a universe of logical elements is a collection of subsets (quorums) of elements, any two of which intersect. In numerous distributed algorithms, the elements ...
KBSE
2005
IEEE
14 years 4 months ago
2005
IEEE
In test generation based on model-checking, white-box test criteria are represented as trap conditions written in a temporal logic. A model checker is used to refute trap conditio...