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» A Logical Basis for the Specification of Reconfigurable Comp...
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ICFP
2010
ACM
13 years 7 months ago
ReCaml: execution state as the cornerstone of reconfigurations
Most current techniques fail to achieve the dynamic update of recursive functions. A focus on execution states appears to be essential in order to implement dynamic update in this...
Jérémy Buisson, Fabien Dagnat
FCCM
2004
IEEE
118views VLSI» more  FCCM 2004»
13 years 11 months ago
Virtual Memory Window for a Portable Reconfigurable Cryptography Coprocessor
Reconfigurable System-on-Chip (SoC) platforms that incorporate hard-core processors surrounded by large amounts of FPGA are today commodities: the reconfigurable logic is often us...
Miljan Vuletic, Laura Pozzi, Paolo Ienne
DAC
2002
ACM
14 years 8 months ago
Dynamic hardware plugins in an FPGA with partial run-time reconfiguration
Tools and a design methodology have been developed to support partial run-time reconfiguration of FPGA logic on the Field Programmable Port Extender. High-speed Internet packet pr...
Edson L. Horta, John W. Lockwood, David E. Taylor,...
JBI
2006
119views Bioinformatics» more  JBI 2006»
13 years 7 months ago
Automatic generation of spoken dialogue from medical plans and ontologies
This paper presents some research undertaken as part of the EU-funded HOMEY project, into the application of intelligent dialogue systems to healthcare systems. The work presented...
Martin Beveridge, John Fox
DAC
2004
ACM
14 years 8 months ago
Virtual memory window for application-specific reconfigurable coprocessors
Reconfigurable Systems-on-Chip (SoCs) on the market consist of full-fledged processors and large Field-Programmable Gate-Arrays (FPGAs). The latter can be used to implement the sy...
Miljan Vuletic, Laura Pozzi, Paolo Ienne