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» A Logical Viewpoint on Architectures
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HPCA
1999
IEEE
14 years 7 days ago
Using Lamport Clocks to Reason about Relaxed Memory Models
Cache coherence protocols of current shared-memory multiprocessors are difficult to verify. Our previous work proposed an extension of Lamport's logical clocks for showing th...
Anne Condon, Mark D. Hill, Manoj Plakal, Daniel J....
ICDAR
1999
IEEE
14 years 7 days ago
Preattentive Reading and Selective Attention for Document Image Analysis
PixED (from Pixel to Electronic Document) is aimed at converting document images into structured electronic documents which can be read by a machine for information retrieval. The...
Claudie Faure
32
Voted
GLVLSI
1998
IEEE
122views VLSI» more  GLVLSI 1998»
14 years 6 days ago
Reducing Power Consumption of Dedicated Processors Through Instruction Set Encoding
With the increased clock frequency of modern, high-performance processors over 500 MHz, in some cases, limiting the power dissipation has become the most stringent design target. ...
Luca Benini, Giovanni De Micheli, Alberto Macii, E...
VLDB
1999
ACM
148views Database» more  VLDB 1999»
14 years 5 days ago
Loading a Cache with Query Results
Data intensive applications today usually run in either a clientserver or a middleware environment. In either case, they must efficiently handle both database queries, which proc...
Laura M. Haas, Donald Kossmann, Ioana Ursu
MICRO
1998
IEEE
91views Hardware» more  MICRO 1998»
14 years 5 days ago
Effective Cluster Assignment for Modulo Scheduling
Clustering is one solution to the demand for wideissue machines and fast clock cycles because it allows for smaller, less ported register files and simpler bypass logic while rema...
Erik Nystrom, Alexandre E. Eichenberger