Clock gating is a power reduction technique that has been used successfully in the custom ASIC domain. Clock and logic signal power are saved by temporarily disabling the clock si...
This paper presents a generic architecture for an agent capable of designing and creating new agents. The design agent itself is based on an existing generic agent model, and inclu...
Frances M. T. Brazier, Catholijn M. Jonker, Jan Tr...
This paper describes a dynamically reconfigurable hardware-based computer called the Plastic Cell Architecture (PCA). PCA consists of dualstructured sea-of -cells that consist of a...
This paper presents a new test response compaction technique with any number of unknown logic values (X’s) in the test response bits. The technique leverages an X-tolerant respo...
Semantic Web Enabled Web Services (SWWS) will transform the web from a static collection of information into a distributed device of computation on the basis of Semantic Web techn...
Christoph Bussler, Dieter Fensel, Alexander Maedch...