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144
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TCAD
2008
15 years 5 months ago
2008
Boolean matching is one of the enabling techniques for technology mapping and logic resynthesis of Field Programmable Gate Array (FPGA). SAT-based Boolean matching (SAT-BM) has bee...
153
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INFOCOM
2010
IEEE
15 years 4 months ago
2010
IEEE
—We investigate the design of a clean-slate control and nt plane for data networks using the abstraction of 4D architecture, utilizing and extending 4D’s concept of logically c...
124
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ISQED
2003
IEEE
15 years 11 months ago
2003
IEEE
- This paper investigates important problems involved in the design of a CML buffer as well as a chain of tapered CML buffers. A new design procedure to systematically design a cha...
178
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ADL
1998
Springer
15 years 10 months ago
1998
Springer
This paper introduces the MREF framework for representing and correlating information at a higher semantic level than is possible with Web-based information systems today. The rol...
138
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ASPDAC
2005
ACM
15 years 8 months ago
2005
ACM
— The pressure of fundamental limits on classical computation and the promise of exponential speedups from quantum effects have recently brought quantum circuits to the attention...