29 search results - page 3 / 6 » A Memory Controller for Improved Performance of Streamed Com... |
WMPI
2004
ACM
14 years 28 days ago
2004
ACM
Abstract. In this paper, we propose a processor architecture with programmable on-chip memory for a high-performance SMP (symmetric multi-processor) node named SCIMA-SMP (Software ...
IPPS
1998
IEEE
13 years 11 months ago
1998
IEEE
This paper presents reduction recognition and parallel code generationstrategies for distributed-memorymultiprocessors. We describe techniques to recognize a broad range of implic...
CF
2009
ACM
14 years 2 months ago
2009
ACM
Chip Multiprocessor (CMP) memory systems suffer from the effects of destructive thread interference. This interference reduces performance predictability because it depends heavil...
ASAP
2006
IEEE
14 years 1 months ago
2006
IEEE
Data-Pipelining is a widely used model to represent streaming applications. Incremental decomposition and optimization of a data-pipelining application onto a multi-processor plat...
ICS
2000
Tsinghua U.
13 years 11 months ago
2000
Tsinghua U.
Memory system bottlenecks limit performance for many applications, and computations with strided access patterns are among the hardest hit. The streams used in such applications h...