Sciweavers

383 search results - page 23 / 77
» A Methodology for High Level Power Estimation and Exploratio...
Sort
View
ISLPED
2003
ACM
155views Hardware» more  ISLPED 2003»
14 years 1 months ago
Low-power high-level synthesis for FPGA architectures
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
Deming Chen, Jason Cong, Yiping Fan
ASAP
2005
IEEE
165views Hardware» more  ASAP 2005»
14 years 1 months ago
CONAN - A Design Exploration Framework for Reliable Nano-Electronics
In this paper we introduce a design methodology that allows the system/circuit designer to build reliable systems out of unreliable nano-scale components. The central point of our...
Sorin Cotofana, Alexandre Schmid, Yusuf Leblebici,...
ISLPED
2006
ACM
83views Hardware» more  ISLPED 2006»
14 years 1 months ago
Considering process variations during system-level power analysis
Process variations will increasingly impact the operational characteristics of integrated circuits in nanoscale semiconductor technologies. Researchers have proposed various desig...
Saumya Chandra, Kanishka Lahiri, Anand Raghunathan...
ICRA
2010
IEEE
189views Robotics» more  ICRA 2010»
13 years 6 months ago
Affordable SLAM through the co-design of hardware and methodology
— Simultaneous localization and mapping (SLAM) is a prominent feature for autonomous robots operating in undefined environments. Applications areas such as consumer robotics app...
Stéphane Magnenat, Valentin Longchamp, Mich...
DATE
2008
IEEE
116views Hardware» more  DATE 2008»
14 years 2 months ago
A Virtual Prototype for Bluetooth over Ultra Wide Band System Level Design
The industry is merging two different Wireless Personal Area Networks (WPAN) technologies: Bluetooth (BT) and WiMedia Ultra Wide Band (UWB), into a single BT over UWB (BToUWB) spe...
Alexandre Lewicki, Javier del Prado Pavon, Jacky T...