383 search results - page 28 / 77 » A Methodology for High Level Power Estimation and Exploratio... |
RSP
2006
IEEE
14 years 1 months ago
2006
IEEE
In a hardware-software co-design environment, an application is partitioned into modules. Each module is then mapped either to software or to hardware. The mapping process is driv...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
—In embedded computing we face a continuously growing algorithm complexity combined with a constantly rising number of applications running on a single system. Multi-core systems...
DATE
1999
IEEE
14 years 2 days ago
1999
IEEE
Estimating switching activity is a crucial step in optimizing circuits for low power. In this paper, a fast gate level switching activity estimator for combinational circuits will...
DATE
2002
IEEE
14 years 22 days ago
2002
IEEE
We present an area and delay estimator in the context of a compiler that takes in high level signal and image processing applications described in MATLAB and performs automatic de...
DAC
2004
ACM
13 years 11 months ago
2004
ACM
The high leakage current in nano-meter regimes is becoming a significant portion of power dissipation in CMOS circuits as threshold voltage, channel length, and gate oxide thickne...