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DDECS
2006
IEEE
146views Hardware» more  DDECS 2006»
13 years 11 months ago
Automatic Identification of Timing Anomalies for Cycle-Accurate Worst-Case Execution Time Analysis
Abstract-- Hard real-time systems need methods to determine upper bounds for their execution times, usually called worst-case execution times. Timing anomalies are counterintuitive...
Jochen Eisinger, Ilia Polian, Bernd Becker, Alexan...
MSWIM
2006
ACM
14 years 1 months ago
Testing methodology for an ad hoc routing protocol
In this paper, we define a model of an ad hoc routing protocol, i.e. the OLSR (Optimized Link-State Routing) protocol. This model handles novel constraints related to such networ...
Stéphane Maag, Fatiha Zaïdi
PATMOS
2007
Springer
14 years 1 months ago
Soft Error-Aware Power Optimization Using Gate Sizing
—Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the...
Foad Dabiri, Ani Nahapetian, Miodrag Potkonjak, Ma...
SIGSOFT
2010
ACM
13 years 5 months ago
Differential static analysis: opportunities, applications, and challenges
It is widely believed that program analysis can be more closely targeted to the needs of programmers if the program is accompanied by further redundant documentation. This may inc...
Shuvendu K. Lahiri, Kapil Vaswani, C. A. R. Hoare
ADHOCNOW
2008
Springer
14 years 2 months ago
Distributed Monitoring in Ad Hoc Networks: Conformance and Security Checking
Ad hoc networks are exposed more than traditional networks to security threats due to their mobility and open architecture aspects. In addition, any dysfunction due to badly congu...
Wissam Mallouli, Bachar Wehbi, Ana R. Cavalli