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» A Microeconomic Scheduler for Parallel Computers
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CASES
2009
ACM
14 years 3 months ago
CGRA express: accelerating execution using dynamic operation fusion
Coarse-grained reconfigurable architectures (CGRAs) present an appealing hardware platform by providing programmability with the potential for high computation throughput, scalab...
Yongjun Park, Hyunchul Park, Scott A. Mahlke
JSSPP
2005
Springer
14 years 2 months ago
Modeling User Runtime Estimates
User estimates of job runtimes have emerged as an important component of the workload on parallel machines, and can have a significant impact on how a scheduler treats different ...
Dan Tsafrir, Yoav Etsion, Dror G. Feitelson
IPPS
2008
IEEE
14 years 3 months ago
Providing flow based performance guarantees for buffered crossbar switches
Buffered crossbar switches are a special type of combined input-output queued switches with each crosspoint of the crossbar having small on-chip buffers. The introduction of cross...
Deng Pan, Yuanyuan Yang
IPPS
2010
IEEE
13 years 6 months ago
KRASH: Reproducible CPU load generation on many-core machines
Abstract--In this article we present KRASH, a tool for reproducible generation of system-level CPU load. This tool is intended for use in shared memory machines equipped with multi...
Swann Perarnau, Guillaume Huard
ESCIENCE
2006
IEEE
14 years 3 months ago
Using Checkpointing to Enhance Turnaround Time on Institutional Desktop Grids
In this paper, we present a checkpoint-based scheme to improve the turnaround time of bag-of-tasks applications executed on institutional desktop grids. We propose to share checkp...
Patrício Domingues, Artur Andrzejak, Lu&iac...