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» A Microeconomic Scheduler for Parallel Computers
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HPCA
1997
IEEE
14 years 1 months ago
Datapath Design for a VLIW Video Signal Processor
This paper represents a design study of the datapath for a very long instruction word (VLIW) video signal processor (VSP). VLIW architectures provide high parallelism and excellen...
Andrew Wolfe, Jason Fritts, Santanu Dutta, Edil S....
EUROPAR
2000
Springer
14 years 14 days ago
Ahnentafel Indexing into Morton-Ordered Arrays, or Matrix Locality for Free
Abstract. Definitions for the uniform representation of d-dimensional matrices serially in Morton-order (or Z-order) support both their use with cartesian indices, and their divide...
David S. Wise
ICPP
2008
IEEE
14 years 3 months ago
Optimizing Issue Queue Reliability to Soft Errors on Simultaneous Multithreaded Architectures
The issue queue (IQ) is a key microarchitecture structure for exploiting instruction-level and thread-level parallelism in dynamically scheduled simultaneous multithreaded (SMT) p...
Xin Fu, Wangyuan Zhang, Tao Li, José A. B. ...
IPPS
2008
IEEE
14 years 3 months ago
Large-scale experiment of co-allocation strategies for Peer-to-Peer supercomputing in P2P-MPI
High Performance computing generally involves some parallel applications to be deployed on the multiples resources used for the computation. The problem of scheduling the applicat...
Stéphane Genaud, Choopan Rattanapoka
PLDI
2011
ACM
12 years 11 months ago
Automatic compilation of MATLAB programs for synergistic execution on heterogeneous processors
MATLAB is an array language, initially popular for rapid prototyping, but is now being increasingly used to develop production code for numerical and scientific applications. Typ...
Ashwin Prasad, Jayvant Anantpur, R. Govindarajan