389 search results - page 54 / 78 » A Model for the Coanalysis of Hardware and Software Architec... |
APCSAC
2007
IEEE
14 years 1 months ago
2007
IEEE
Although they have been the main server technology for many years, multiprocessors are undergoing a renaissance due to multi-core chips and the attractive scalability properties of...
POPL
2010
ACM
14 years 4 months ago
2010
ACM
We address the verification problem of finite-state concurrent programs running under weak memory models. These models capture the reordering of program (read and write) operation...
ARCS
2008
Springer
13 years 9 months ago
2008
Springer
Due to increasing complexity of modern real-time image processing applications, classical hardware development at register transfer level becomes more and more the bottleneck of te...
MICRO
2010
IEEE
13 years 5 months ago
2010
IEEE
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
WOSP
1998
ACM
13 years 11 months ago
1998
ACM
The POEMS project is creating an environment for end-to-end performance modeling of complex parallel and distributed systems, spanning the domains of application software, runti...