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ARCS
2008
Springer
13 years 9 months ago
Synthesis of Multi-dimensional High-Speed FIFOs for Out-of-Order Communication
Due to increasing complexity of modern real-time image processing applications, classical hardware development at register transfer level becomes more and more the bottleneck of te...
Joachim Keinert, Christian Haubelt, Jürgen Te...
HPCA
2011
IEEE
12 years 11 months ago
A new server I/O architecture for high speed networks
Traditional architectural designs are normally focused on CPUs and have been often decoupled from I/O considerations. They are inefficient for high-speed network processing with a...
Guangdeng Liao, Xia Znu, Laxmi N. Bhuyan
AHS
2006
IEEE
152views Hardware» more  AHS 2006»
14 years 1 months ago
Architecture of a Dynamically Reconfigurable NoC for Adaptive Reconfigurable MPSoC
This paper describes the architecture of our dynamically reconfigurable Network-on-Chip (NoC) architecture that has been proposed for reconfigurable Multiprocessor system-on-chip ...
Balal Ahmad, Ahmet T. Erdogan, Sami Khawam
PDPTA
2000
13 years 8 months ago
The PODOS File System - Exploiting the High-Speed Communication Subsystem
Performance Oriented Distributed Operating System (PODOS) is a clustering environment, being built on a monolithic Linux kernel. PODOS augments very few components to the Linux ke...
Sudharshan Vazhkudai, P. Tobin Maginnis
ICOIN
2007
Springer
14 years 1 months ago
Providing Full QoS with 2 VCs in High-Speed Switches
Alejandro Martínez, Francisco José A...