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» A Network Congestion-Aware Memory Controller
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NOCS
2008
IEEE
14 years 2 months ago
Debugging Distributed-Shared-Memory Communication at Multiple Granularities in Networks on Chip
We present a methodology to debug a SOC by concentrating on its communication. Our extended communication model includes a) multiple signal groups per interface protocol at each I...
Bart Vermeulen, Kees Goossens, Siddharth Umrani
AHS
2006
IEEE
100views Hardware» more  AHS 2006»
14 years 2 months ago
Wormhole Routing with Virtual Channels using Adaptive Rate Control for Network-on-Chip (NoC)
This paper presents a new approach in realizing Virtual Channels tailored for Network on Chip implementations. The technique makes use of a flow control mechanism based on adaptiv...
Ioannis Nousias, Tughrul Arslan
DAC
2009
ACM
14 years 9 months ago
An SDRAM-aware router for Networks-on-Chip
In this paper, we present an NoC (Networks-on-Chip) router with an SDRAM-aware flow control. Based on a priority-based arbitration, it schedules packets to improve memory utilizat...
Wooyoung Jang, David Z. Pan
ICANNGA
2007
Springer
153views Algorithms» more  ICANNGA 2007»
13 years 10 months ago
A Neural Framework for Robot Motor Learning Based on Memory Consolidation
Neural networks are a popular technique for learning the adaptive control of non-linear plants. When applied to the complex control of android robots, however, they suffer from se...
Heni Ben Amor, Shuhei Ikemoto, Takashi Minato, Ber...
CLUSTER
2005
IEEE
14 years 2 months ago
Memory Management Support for Multi-Programmed Remote Direct Memory Access (RDMA) Systems
Current operating systems offer basic support for network interface controllers (NICs) supporting remote direct memory access (RDMA). Such support typically consists of a device d...
Kostas Magoutis