3629 search results - page 53 / 726 » A Network Memory Architecture Model and Performance Analysis |
126
Voted
ISCA
2009
IEEE
15 years 10 months ago
2009
IEEE
Analysis of technology and application trends reveals a growing imbalance in the peak compute-to-memory-capacity ratio for future servers. At the same time, the fraction contribut...
122
Voted
IPL
1998
15 years 3 months ago
1998
We propose, and justify, an economic theory to guide memory system design, operation, and analysis. Our theory treats memory random-access latency, and its cost per installed mega...
115
Voted
EUROPDS
1997
15 years 4 months ago
1997
In this paper, we follow a new path to arrive at the idea of a COMA — a Cache Only Memory Architecture. We show how the evolution of another architecture (ADARC) leads quite nat...
118
Voted
HIPEAC
2005
Springer
15 years 9 months ago
2005
Springer
Abstract. This paper presents a new security architecture for protecting software confidentiality and integrity. Different from the previous process-centric systems designed for ...
168
Voted
IPPS
2005
IEEE
15 years 9 months ago
2005
IEEE
This paper presents a compiler methodology for memoryaware mapping on 2-Dimensional coarse-grained reconfigurable architectures that aims in improving the mapped applications’ p...