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» A Network Memory Architecture Model and Performance Analysis
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SECON
2010
IEEE
13 years 5 months ago
Coexistence-Aware Scheduling for Wireless System-on-a-Chip Devices
Abstract--Today's mobile devices support many wireless technologies to achieve ubiquitous connectivity. Economic and energy constraints, however, drive the industry to impleme...
Lei Yang, Vinod Kone, Xue Yang, York Liu, Ben Y. Z...
HPCA
2009
IEEE
14 years 8 months ago
Optimizing communication and capacity in a 3D stacked reconfigurable cache hierarchy
Cache hierarchies in future many-core processors are expected to grow in size and contribute a large fraction of overall processor power and performance. In this paper, we postula...
Niti Madan, Li Zhao, Naveen Muralimanohar, Anirudd...
EUROPAR
2009
Springer
14 years 2 months ago
PSINS: An Open Source Event Tracer and Execution Simulator for MPI Applications
The size of supercomputers in numbers of processors is growing exponentially. Today’s largest supercomputers have upwards of a hundred thousand processors and tomorrow’s may ha...
Mustafa M. Tikir, Michael Laurenzano, Laura Carrin...
CODES
2009
IEEE
14 years 2 months ago
Exploiting data-redundancy in reliability-aware networked embedded system design
This paper presents a system-level design methodology for networked embedded systems that exploits existing data-redundancy to increase their reliability. The presented approach n...
Martin Lukasiewycz, Michael Glaß, Jürge...
INFOCOM
2008
IEEE
14 years 2 months ago
Joint Effects of Radio Channels and Node Mobility on Link Dynamics in Wireless Networks
—In this paper, we study link properties over dynamic radio channels based on analytical models and simulations. Specifically, channel variability and mobility are investigated ...
Wenye Wang, Ming Zhao 0001