3629 search results - page 63 / 726 » A Network Memory Architecture Model and Performance Analysis |
ISPASS
2010
IEEE
13 years 9 months ago
2010
IEEE
Abstract—Transactional memory promises to generalize transactional programming to mainstream languages and data structures. The purported benefit of transactions is that they ar...
CODES
2008
IEEE
13 years 9 months ago
2008
IEEE
Memory subsystems have been considered as one of the most critical components in embedded systems and furthermore, displaying increasing complexity as application requirements div...
TVLSI
2008
13 years 7 months ago
2008
Reconfigurable hardware has become a well-accepted option for implementing digital signal processing (DSP). Traditional devices such as field-programmable gate arrays offer good fi...
SIGMETRICS
2008
ACM
13 years 7 months ago
2008
ACM
Burstiness and temporal dependence in service processes are often found in multi-tier architectures and storage devices and must be captured accurately in capacity planning models...
WWW
2005
ACM
14 years 8 months ago
2005
ACM
Design of high performance Web servers has become a recent research thrust to meet the increasing demand of networkbased services. In this paper, we propose a new Web server archi...