Sciweavers

3629 search results - page 91 / 726
» A Network Memory Architecture Model and Performance Analysis
Sort
View
ICASSP
2011
IEEE
12 years 11 months ago
A multi-stream ASR framework for BLSTM modeling of conversational speech
We propose a novel multi-stream framework for continuous conversational speech recognition which employs bidirectional Long Short-Term Memory (BLSTM) networks for phoneme predicti...
Martin Wöllmer, Florian Eyben, Björn Sch...
SIGMETRICS
2005
ACM
156views Hardware» more  SIGMETRICS 2005»
14 years 1 months ago
Evaluating the impact of simultaneous multithreading on network servers using real hardware
This paper examines the performance of simultaneous multithreading (SMT) for network servers using actual hardware, multiple network server applications, and several workloads. Us...
Yaoping Ruan, Vivek S. Pai, Erich M. Nahum, John M...
ICASSP
2008
IEEE
14 years 2 months ago
Address assignment sensitive variable partitioning and scheduling for DSPS with multiple memory banks
Multiple memory banks design is employed in many high performance DSP processors. This architectural feature supports higher memory bandwidth by allowing multiple data memory acce...
Chun Jason Xue, Tiantian Liu, Zili Shao, Jingtong ...
AAECC
2007
Springer
87views Algorithms» more  AAECC 2007»
13 years 8 months ago
Towards an accurate performance modeling of parallel sparse factorization
We present a simulation-based performance model to analyze a parallel sparse LU factorization algorithm on modern cached-based, high-end parallel architectures. We consider supern...
Laura Grigori, Xiaoye S. Li
ICYCS
2008
IEEE
14 years 2 months ago
VM-based Architecture for Network Monitoring and Analysis
A single physical machine provides multiple network monitoring and analysis services (e.g., IDS, QoS) which are installed on the same operating system. Isolation between services ...
Qiang Li, Qinfen Hao, Limin Xiao, Zhoujun Li