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IPPS
2007
IEEE
14 years 3 months ago
Performance Evaluation of two Parallel Programming Paradigms Applied to the Symplectic Integrator Running on COTS PC Cluster
There are two popular parallel programming paradigms available to high performance computing users such as engineering and physics professionals: message passing and distributed s...
Lorena B. C. Passos, Gerson H. Pfitscher, Tarcisio...
ICPP
2008
IEEE
14 years 3 months ago
Taming Single-Thread Program Performance on Many Distributed On-Chip L2 Caches
This paper presents a two-part study on managing distributed NUCA (Non-Uniform Cache Architecture) L2 caches in a future manycore processor to obtain high singlethread program per...
Lei Jin, Sangyeun Cho
ASPLOS
2012
ACM
12 years 4 months ago
Reflex: using low-power processors in smartphones without knowing them
To accomplish frequent, simple tasks with high efficiency, it is necessary to leverage low-power, microcontroller-like processors that are increasingly available on mobile systems...
Felix Xiaozhu Lin, Zhen Wang, Robert LiKamWa, Lin ...
PADS
2000
ACM
14 years 1 months ago
ROSS: a high-performance, low memory, modular time warp system
In this paper, we introduce a new Time Warp system called ROSS: Rensselaer’s Optimistic Simulation System. ROSS is an extremely modular kernel that is capable of achieving event...
Christopher D. Carothers, David W. Bauer, Shawn Pe...
IPPS
2010
IEEE
13 years 6 months ago
Servet: A benchmark suite for autotuning on multicore clusters
Abstract--The growing complexity in computer system hierarchies due to the increase in the number of cores per processor, levels of cache (some of them shared) and the number of pr...
Jorge González-Domínguez, Guillermo ...