509 search results - page 64 / 102 » A New Multiport Memory for High Performance Parallel Process... |
ICS
2009
Tsinghua U.
14 years 3 months ago
2009
Tsinghua U.
Iterative stencil loops (ISLs) are used in many applications and tiling is a well-known technique to localize their computation. When ISLs are tiled across a parallel architecture...
IPPS
2000
IEEE
14 years 1 months ago
2000
IEEE
Networks of workstations are fast becoming the standard environment for parallel applications. However, the use of “found” resources as a platform for tightly-coupled runtime ...
ICDE
2006
IEEE
14 years 10 months ago
2006
IEEE
In this demo we present the cgmOLAP server, the first fully functional parallel OLAP system able to build data cubes at a rate of more than 1 Terabyte per hour. cgmOLAP incorporat...
TPDS
2010
13 years 7 months ago
2010
The objective of this paper is to extend, in the context of multicore architectures, the concepts of tile algorithms [Buttari et al., 2007] for Cholesky, LU, QR factorizations to t...
EH
2004
IEEE
14 years 18 days ago
2004
IEEE
The use of Application Specific Instruction-set Processors (ASIP) in embedded systems is a solution to the problem of increasing complexity in the functions these systems have to ...