73 search results - page 11 / 15 » A New Pipelined Array Architecture for Signed Multiplication |
TAMC
2007
Springer
14 years 1 months ago
2007
Springer
In previous work we have introduced an average-case measure for the time complexity of Boolean circuits – that is the delay between feeding the input bits into a circuit and the ...
BMCBI
2008
13 years 7 months ago
2008
Background: The ESTree database (db) is a collection of Prunus persica and Prunus dulcis EST sequences that in its current version encompasses 75,404 sequences from 3 almond and 1...
CF
2009
ACM
14 years 2 months ago
2009
ACM
In this paper, we compare the architectural perspectives of the Wave Field Synthesis (WFS) 3D-audio algorithm mapped on three different platforms: a General Purpose Processor (GP...
INFOCOM
2010
IEEE
13 years 5 months ago
2010
IEEE
It is becoming apparent that the next generation IP route lookup architecture needs to achieve speeds of 100Gbps and beyond while supporting both IPv4 and IPv6 with fast real-time ...
PDP
2009
IEEE
14 years 2 months ago
2009
IEEE
Abstract—Execution of applications on upcoming highperformance computing (HPC) systems introduces a variety of new challenges and amplifies many existing ones. These systems will...