Sciweavers

73 search results - page 7 / 15
» A New Pipelined Array Architecture for Signed Multiplication
Sort
View
IPPS
2007
IEEE
14 years 1 months ago
Improving Scalability of OpenMP Applications on Multi-core Systems Using Large Page Support
Modern multi-core architectures have become popular because of the limitations of deep pipelines and heating and power concerns. Some of these multi-core architectures such as the...
Ranjit Noronha, Dhabaleswar K. Panda
IWCMC
2006
ACM
14 years 28 days ago
Low complexity virtual antenna arrays using cooperative relay selection
We study the diversity-multiplexing tradeoff in cooperative diversity systems involving multiple relays. We focus on low complexity architectures that do not require simultaneous...
Aggelos Bletsas, Ashish Khisti, Moe Z. Win
CORR
2010
Springer
153views Education» more  CORR 2010»
13 years 7 months ago
Towards an Efficient Tile Matrix Inversion of Symmetric Positive Definite Matrices on Multicore Architectures
The algorithms in the current sequential numerical linear algebra libraries (e.g. LAPACK) do not parallelize well on multicore architectures. A new family of algorithms, the tile a...
Emmanuel Agullo, Henricus Bouwmeester, Jack Dongar...
CGO
2008
IEEE
14 years 1 months ago
Parallel-stage decoupled software pipelining
In recent years, the microprocessor industry has embraced chip multiprocessors (CMPs), also known as multi-core architectures, as the dominant design paradigm. For existing and ne...
Easwaran Raman, Guilherme Ottoni, Arun Raman, Matt...
ASPLOS
2004
ACM
14 years 12 days ago
Scalable selective re-execution for EDGE architectures
Pipeline flushes are becoming increasingly expensive in modern microprocessors with large instruction windows and deep pipelines. Selective re-execution is a technique that can r...
Rajagopalan Desikan, Simha Sethumadhavan, Doug Bur...