In this paper we investigate experimentally the performance of Marginal Cost (MC) and Shapley Value (SH) mechanisms for sharing the cost of multicast transmissions. We implement a...
Abstract-- With the constantly increasing gate capacity of FPGAs, a single FPGA chip is able to employ large-scale applications. To connect a large number of computational nodes, N...
— A powerful path computation element is a must for the next-generation IP-over-Optical networks to support ondemand service provisioning crossing layers. The main purpose of pat...
Xi Yang, Tom Lehman, Kenichi Ogaki, Tomohiro Otani
This paper presents a new Multilevel hierarchical FPGA (MFPGA) architecture that unifies two unidirectional programmable networks: A predictible downward network based on the But...
Hayder Mrabet, Zied Marrakchi, Pierre Souillot, Ha...
In this paper we experimentally analyse various dynamic timeout adjustment strategies in server queues as potential counter-measures against degradation of service attacks. Previo...