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» A Parallel Hardware Architecture for Image Feature Detection
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SIGOPS
2011
215views Hardware» more  SIGOPS 2011»
13 years 3 months ago
Log-based architectures: using multicore to help software behave correctly
While application performance and power-efficiency are both important, application correctness is even more important. In other words, if the application is misbehaving, it is li...
Shimin Chen, Phillip B. Gibbons, Michael Kozuch, T...
CAMP
2005
IEEE
14 years 2 months ago
Speeding-up NCC-Based Template Matching Using Parallel Multimedia Instructions
— This paper describes the mapping of a recently introduced template matching algorithm based on the Normalized Cross Correlation (NCC) on a general purpose processor endowed wit...
Luigi di Stefano, Stefano Mattoccia, Federico Tomb...
CLUSTER
2009
IEEE
14 years 3 months ago
Accelerating SIFT on parallel architectures
Abstract—SIFT is a widely-used algorithm that extracts features from images; using it to extract information from hundreds of terabytes of aerial and satellite photographs requir...
Seth Warn, Wesley Emeneker, Jackson Cothren, Amy W...
ICDE
2006
IEEE
206views Database» more  ICDE 2006»
14 years 10 months ago
Query Co-Processing on Commodity Hardware
The rapid increase in the data volumes for the past few decades has intensified the need for high processing power for database and data mining applications. Researchers have acti...
Anastassia Ailamaki, Naga K. Govindaraju, Dinesh M...
TC
2010
13 years 7 months ago
Network-on-Chip Hardware Accelerators for Biological Sequence Alignment
—The most pervasive compute operation carried out in almost all bioinformatics applications is pairwise sequence homology detection (or sequence alignment). Due to exponentially ...
Souradip Sarkar, Gaurav Ramesh Kulkarni, Partha Pr...