471 search results - page 16 / 95 » A Parallel Hardware Architecture for Image Feature Detection |
AVSS
2009
IEEE
13 years 6 months ago
2009
IEEE
The paper presents a method for efficient text detection in unconstrained environments, based on image features derived from connected components and on a classification architect...
SPAA
2010
ACM
14 years 1 months ago
2010
ACM
We explore the potential of hardware transactional memory (HTM) to improve concurrent algorithms. We illustrate a number of use cases in which HTM enables significantly simpler c...
DAGM
2008
Springer
13 years 10 months ago
2008
Springer
Abstract. In this paper, we propose a new approach to learn structured visual compound models from shape-based feature descriptions. We use captioned text in order to drive the pro...
ISCA
1995
IEEE
14 years 5 days ago
1995
IEEE
Latency tolerance is essential in achieving high performance on parallel computers for remote function calls and fine-grained remote memory accesses. EM-X supports interprocessor ...
DICTA
2007
13 years 10 months ago
2007
We present an efficient method for mutual information (MI) computation between images (2D or 3D) for NVIDIA’s ‘compute unified device architecture’ (CUDA) compatible devic...