471 search results - page 24 / 95 » A Parallel Hardware Architecture for Image Feature Detection |
102
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MVA
1992
15 years 4 months ago
1992
This paper presents the design of an ASIC intended for optimal edge detection of blurred and noisy 2-D images. The chip has a parallel and pipelined architecture which processes a...
136
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CAMP
2005
IEEE
15 years 9 months ago
2005
IEEE
Abstract— Robot vision systems notoriously require large computing capabilities, rarely available on physical devices. Robots have limited embedded hardware, and almost all senso...
137
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ISCAS
2005
IEEE
15 years 9 months ago
2005
IEEE
—The pervasive distribution of digital images triggers an emergent need of authenticating degraded images by lossy compression and transmission. This paper proposes a robust cont...
126
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CGO
2003
IEEE
15 years 8 months ago
2003
IEEE
Optimizing programs at run-time provides opportunities to apply aggressive optimizations to programs based on information that was not available at compile time. At run time, prog...
132
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ECOOP
2008
Springer
15 years 5 months ago
2008
Springer
Abstract. The paradigm shift in processor design from monolithic processors to multicore has renewed interest in programming models that facilitate parallelism. While multicores ar...