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» A Parallel N-Body Integrator Using MPI
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IPPS
2003
IEEE
14 years 1 months ago
An Evaluation of Current High-Performance Networks
High-end supercomputers are increasingly built out of commodity components, and lack tight integration between the processor and network. This often results in inefficiencies in ...
Christian Bell, Dan Bonachea, Yannick Cote, Jason ...
CLOUDCOM
2010
Springer
13 years 6 months ago
REMEM: REmote MEMory as Checkpointing Storage
Checkpointing is a widely used mechanism for supporting fault tolerance, but notorious in its high-cost disk access. The idea of memory-based checkpointing has been extensively stu...
Hui Jin, Xian-He Sun, Yong Chen, Tao Ke
CLUSTER
2006
IEEE
14 years 9 days ago
A Performance Instrumentation Framework to Characterize Computation-Communication Overlap in Message-Passing Systems
Effective overlap of computation and communication is a well understood technique for latency hiding and can yield significant performance gains for applications on high-end compu...
Aniruddha G. Shet, P. Sadayappan, David E. Bernhol...
ICS
2009
Tsinghua U.
14 years 1 months ago
Exploring pattern-aware routing in generalized fat tree networks
New static source routing algorithms for High Performance Computing (HPC) are presented in this work. The target parallel architectures are based on the commonly used fattree netw...
Germán Rodríguez, Ramón Beivi...
APCSAC
2006
IEEE
14 years 2 months ago
A High Performance Simulator System for a Multiprocessor System Based on a Multi-way Cluster
In the ubiquitous era, it is necessary to research the architectures of multiprocessor system with high performance and low power consumption. A simulator developed in high level l...
Arata Shinozaki, Masatoshi Shima, Minyi Guo, Mitsu...