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» A Parallel Packet Screen for High Speed Networks
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DAC
2005
ACM
14 years 9 months ago
Low power network processor design using clock gating
Abstract-- Network processors (NPs) have emerged as successful platforms to providing both high performance and flexibility in building powerful routers. Typical NPs incorporate mu...
Jia Yu, Jun Yang 0002, Laxmi N. Bhuyan, Yan Luo
ICDCSW
2009
IEEE
14 years 3 months ago
A Geometric Routing Protocol in Disruption Tolerant Network
We describe a novel Geometric Localized Routing (GLR) protocol in Disruption (Delay) Tolerant Network (DTN). Although DTNs do not guarantee the connectivity of the network all the...
Jingzhe Du, Evangelos Kranakis, Amiya Nayak
IPPS
2008
IEEE
14 years 3 months ago
Efficient and dependable overlay networks
We describe QoSMap, a novel approach for mapping overlay networks with stringent QoS requirements. QoSMap computes high quality overlay paths by utilizing direct underlay paths th...
Jawwad Shamsi, Monica Brockmeyer
ICDCS
2002
IEEE
14 years 1 months ago
Accelerating Internet Streaming Media Delivery using Network-Aware Partial Caching
Internet streaming applications are affected by adverse network conditions such as high packet loss rates and long delays. This paper aims at mitigating such effects by leveraging...
Shudong Jin, Azer Bestavros, Arun Iyengar
HPCC
2007
Springer
14 years 3 months ago
Stability Aware Routing: Exploiting Transient Route Availability in MANETs
The highly dynamic character of a mobile ad-hoc network (MANET) poses significant challenges on network communications and resource management. Previous work on routing in MANETs ...
Pramita Mitra, Christian Poellabauer, Shivajit Moh...