239 search results - page 33 / 48 » A Performance Evaluation of the Convex SPP-1000 Scalable Sha... |
IPPS
2010
IEEE
13 years 5 months ago
2010
IEEE
Abstract--The now commonplace multi-core chips have introduced, by design, a deep hierarchy of memory and cache banks within parallel computers as a tradeoff between the user frien...
IPPS
2010
IEEE
13 years 5 months ago
2010
IEEE
Predicting how well applications may run on modern systems is becoming increasingly challenging. It is no longer sufficient to look at number of floating point operations and commu...
CCGRID
2003
IEEE
14 years 26 days ago
2003
IEEE
Increasingly large-scale clusters of PC/WS continue to become majority platform in HPC field. Such a commodity cluster environment, there may be incremental upgrade due to severa...
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
Emerging heterogeneous multiprocessors will have custom memory and bus architectures that must balance resource sharing and system partitioning to meet cost constraints. We propos...
IPPS
1999
IEEE
13 years 12 months ago
1999
IEEE
Software DSM systems su er from the high communication and coherence-induced overheads that limit performance. This paper introduces our e orts in reducing system overheads of a h...