204 search results - page 27 / 41 » A Pipelined Memory Architecture for High Throughput Network ... |
SPAA
1996
ACM
13 years 11 months ago
1996
ACM
Several recent papers have proposed or analyzed optimal algorithms to route all-to-all personalizedcommunication (AAPC) over communication networks such as meshes, hypercubes and ...
ASAP
2004
IEEE
13 years 11 months ago
2004
IEEE
We explain how modern programmable logic devices have capabilities that are well suited for them to assume a central role in the implementation of networked systems, now and in th...
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
Search-based graph queries, such as finding short paths and isomorphic subgraphs, are dominated by memory latency. If input graphs can be partitioned appropriately, large cluster...
ISCA
2002
IEEE
13 years 7 months ago
2002
IEEE
In this paper, we consider the tree task graphs which arise from many important programming paradigms such as divide and conquer, branch and bound etc., and the linear task-graphs...
SC
2004
ACM
14 years 29 days ago
2004
ACM
The Merrimac supercomputer uses stream processors and a highradix network to achieve high performance at low cost and low power. The stream architecture matches the capabilities o...