204 search results - page 32 / 41 » A Pipelined Memory Architecture for High Throughput Network ... |
ASPLOS
1998
ACM
13 years 11 months ago
1998
ACM
Advances in VLSI technology will enable chips with over a billion transistors within the next decade. Unfortunately, the centralized-resource architectures of modern microprocesso...
ICPP
2003
IEEE
14 years 24 days ago
2003
IEEE
The bus that connects processors to memory is known to be a major architectural bottleneck in SMPs. However, both software and scheduling policies for these systems generally focu...
CORR
2010
Springer
13 years 4 months ago
2010
Springer
Energy consumption is a critical design issue in real-time systems, especially in battery- operated systems. Maintaining high performance, while extending the battery life between...
SIGCOMM
2005
ACM
14 years 1 months ago
2005
ACM
Hash table is used as one of the fundamental modules in several network processing algorithms and applications such as route lookup, packet classification, per-flow state manage...
EGH
2004
Springer
14 years 28 days ago
2004
Springer
The real time 3D graphics becomes one of the attractive applications for 3G wireless terminals although their battery lifetime and memory bandwidth limit the system resources for ...