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MEMOCODE
2003
IEEE
14 years 20 days ago
LOTOS Code Generation for Model Checking of STBus Based SoC: the STBus interconnect
In the design process of SoC (System on Chip), validation is one of the most critical and costly activity. The main problem for industrial companies like STMicroelectronics, stand...
Pierre Wodey, Geoffrey Camarroque, Fabrice Baray, ...
FPL
2006
Springer
140views Hardware» more  FPL 2006»
13 years 11 months ago
A Thermal Management and Profiling Method for Reconfigurable Hardware Applications
Given large circuit sizes, high clock frequencies, and possibly extreme operating environments, Field Programmable Gate Arrays (FPGAs) are capable of heating beyond their designed...
Phillip H. Jones, John W. Lockwood, Young H. Cho
ISMB
1993
13 years 8 months ago
Minimizing Complexity in Cellular Automata Models of Self-Replication
Understanding self-replication from an information processing perspective is important because, amongother things, it can shed light on molecular mechanismsof biological reproduct...
James A. Reggia, Hui-Hsien Chou, Steven L. Armentr...
CCGRID
2003
IEEE
14 years 21 days ago
Scheduling Distributed Applications: the SimGrid Simulation Framework
— Since the advent of distributed computer systems an active field of research has been the investigation of scheduling strategies for parallel applications. The common approach...
Arnaud Legrand, Loris Marchal, Henri Casanova
BMCBI
2008
110views more  BMCBI 2008»
13 years 7 months ago
Enhancing the prediction of protein pairings between interacting families using orthology information
Background: It has repeatedly been shown that interacting protein families tend to have similar phylogenetic trees. These similarities can be used to predicting the mapping betwee...
José M. G. Izarzugaza, David de Juan, Carle...