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TOMACS
1998
140views more  TOMACS 1998»
13 years 7 months ago
Technical Note: A Hierarchical Computer Architecture Design and Simulation Environment
architectures at multiple levels of abstraction, encompassing both hardware and software. It has five modes of operation (Design, Model Validation, Build Simulation, Simulate Syste...
Paul S. Coe, Fred W. Howell, Roland N. Ibbett, Lau...
AUIC
2006
IEEE
14 years 2 months ago
A markerless registration method for augmented reality based on affine properties
This paper presents a markerless registration approach for Augmented Reality (AR) systems based on the Kanade-Lucas-Tomasi (KLT) natural feature tracker and the affine reconstruct...
Y. Pang, M. L. Yuan, Andrew Y. C. Nee, Soh-Khim On...
DEXAW
2004
IEEE
170views Database» more  DEXAW 2004»
13 years 12 months ago
On-Line Analytical Processing on Large Databases Managed by Computational Grids
Management of large data repositories integrated into the Grid poses new challenges for Grid research. There already exist several successful Data Grid projects addressing process...
Bernhard Fiser, Umut Onan, Ibrahim Elsayed, Peter ...
ICSE
2012
IEEE-ACM
11 years 10 months ago
Where should the bugs be fixed? More accurate information retrieval-based bug localization based on bug reports
—For a large and evolving software system, the project team could receive a large number of bug reports. Locating the source code files that need to be changed in order to fix th...
Jian Zhou, Hongyu Zhang, David Lo
CGO
2010
IEEE
14 years 3 months ago
Automatic creation of tile size selection models
Tiling is a widely used loop transformation for exposing/exploiting parallelism and data locality. Effective use of tiling requires selection and tuning of the tile sizes. This is...
Tomofumi Yuki, Lakshminarayanan Renganarayanan, Sa...