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FPGA
2006
ACM
129views FPGA» more  FPGA 2006»
14 years 11 days ago
Power-aware RAM mapping for FPGA embedded memory blocks
Embedded memory blocks are important resources in contemporary FPGA devices. When targeting FPGAs, application designers often specify high-level memory functions which exhibit a ...
Russell Tessier, Vaughn Betz, David Neto, Thiagara...
FPGA
1997
ACM
127views FPGA» more  FPGA 1997»
14 years 27 days ago
General Modeling and Technology-Mapping Technique for LUT-Based FPGAs
We present a general approach to the FPGA technology mapping problem that applies to any logic block composed of lookup tables LUTs and can yield optimal solutions. The connecti...
Amit Chowdhary, John P. Hayes
PATMOS
2005
Springer
14 years 2 months ago
Enhanced GALS Techniques for Datapath Applications
Abstract. Based on a previously reported request driven technique for Globally-Asynchronous Locally-Synchronous (GALS) circuits this paper presents two significant enhancements. Fi...
Eckhard Grass, Frank Winkler, Milos Krstic, Alexan...
SOSP
2003
ACM
14 years 5 months ago
Capriccio: scalable threads for internet services
This paper presents Capriccio, a scalable thread package for use with high-concurrency servers. While recent work has advocated event-based systems, we believe that threadbased sy...
J. Robert von Behren, Jeremy Condit, Feng Zhou, Ge...
ICSM
1998
IEEE
14 years 29 days ago
Detection of Logical Coupling Based on Product Release History
Code-based metrics such as coupling and cohesion are used to measure a system's structural complexity. But dealing with large systems--those consisting of several millions of...
Harald Gall, Karin Hajek, Mehdi Jazayeri