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TJS
2008
113views more  TJS 2008»
13 years 7 months ago
Improving the parallelism of iterative methods by aggressive loop fusion
Abstract. Traditionally, loop nests are fused only when the data dependences in the loop nests are not violated. This paper presents a new loop fusion algorithm that is capable of ...
Jingling Xue, Minyi Guo, Daming Wei
PATMOS
2000
Springer
13 years 11 months ago
Data-Reuse and Parallel Embedded Architectures for Low-Power, Real-Time Multimedia Applications
Exploitation of data re-use in combination with the use of custom memory hierarchy that exploits the temporal locality of data accesses may introduce significant power savings, esp...
Dimitrios Soudris, Nikolaos D. Zervas, Antonios Ar...
SPAA
1994
ACM
13 years 11 months ago
Bounds on the Greedy Routing Algorithm for Array Networks
We analyze the performance of greedy routing for array networks by providing bounds on the average delay and the average number of packets in the system for the dynamic routing pr...
Michael Mitzenmacher
ISVLSI
2007
IEEE
150views VLSI» more  ISVLSI 2007»
14 years 1 months ago
Minimum-Congestion Placement for Y-interconnects: Some studies and observations
— Y -interconnects for VLSI chips are based on the use of global and semi-global wiring in only 0◦ , 60◦ , and 120◦ . Though X-interconnects are fast replacing the traditio...
Tuhina Samanta, Prasun Ghosal, Hafizur Rahaman, Pa...
PADS
2004
ACM
14 years 1 months ago
Exploiting Symmetry for Partitioning Models in Parallel Discrete Event Simulation
We investigated the benefit of exploiting the symmetries of graphs for partitioning. We represent the model to be simulated by a weighted graph. Graph symmetries are studied in th...
Jan Lemeire, Bart Smets, Philippe Cara, Erik F. Di...