53 search results - page 4 / 11 » A Reconfigurable Distributed Computing Fabric Exploiting Mul... |
ICPP
2009
IEEE
14 years 2 months ago
2009
IEEE
—In an attempt to increase the performance/cost ratio, large compute clusters are becoming heterogeneous at multiple levels: from asymmetric processors, to different system archi...
EUROPAR
2006
Springer
13 years 11 months ago
2006
Springer
Abstract. Programming multimedia applications for System-on-Chip (SoC) architectures is difficult because streaming communication, user event handling, reconfiguration, and paralle...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
: This work tries to reuse programmable communication resources like a Network-on-Chip (NoC) in the acceleration of image applications. We show a mathematical model for the computa...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
In spite of the high parallelism exhibited by cellular automata architectures, most implementations are usually run in software. For increasing execution parallelism, hardware imp...
IPPS
2003
IEEE
14 years 1 months ago
2003
IEEE
Tiled architectures can provide a model for early estimation of global interconnect costs. A design exploration tool for reconfigurable architectures is currently under developmen...