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WCE
2007
13 years 8 months ago
A Graph-based Framework for High-level Test Synthesis
Improving testability during the early stages of High-level synthesis has several advantages including reduced test hardware overhead and design iterations. Recently, BIST techniq...
Ali Pourghaffari bashari, Saadat Pourmozafari
LCPC
2004
Springer
14 years 25 days ago
Speculative Subword Register Allocation in Embedded Processors
Abstract. Multimedia and network processing applications make extensive use of subword data. Since registers are capable of holding a full data word, when a subword variable is ass...
Bengu Li, Youtao Zhang, Rajiv Gupta
CC
2003
Springer
114views System Software» more  CC 2003»
14 years 21 days ago
Combined Code Motion and Register Allocation Using the Value State Dependence Graph
We define the Value State Dependence Graph (VSDG). The VSDG is a form of the Value Dependence Graph (VDG) extended by the addition of state dependence edges to model sequentialise...
Neil Johnson, Alan Mycroft
JCP
2008
135views more  JCP 2008»
13 years 7 months ago
Hybrid Evolutionary Algorithm Based Solution for Register Allocation for Embedded Systems
Embedded systems have an ever-increasing need for optimizing compilers to produce high quality codes with a limited general purpose register set. Either memory or registers are use...
Anjali Mahajan, M. S. Ali
PLDI
2004
ACM
14 years 27 days ago
Balancing register allocation across threads for a multithreaded network processor
+ Modern network processors employ multi-threading to allow concurrency amongst multiple packet processing tasks. We studied the properties of applications running on the network p...
Xiaotong Zhuang, Santosh Pande