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DSN
2007
IEEE
14 years 2 months ago
Using Process-Level Redundancy to Exploit Multiple Cores for Transient Fault Tolerance
Transient faults are emerging as a critical concern in the reliability of general-purpose microprocessors. As architectural trends point towards multi-threaded multi-core designs,...
Alex Shye, Tipp Moseley, Vijay Janapa Reddi, Josep...
EMSOFT
2009
Springer
13 years 11 months ago
Modular static scheduling of synchronous data-flow networks: an efficient symbolic representation
This paper addresses the question of producing modular sequential imperative code from synchronous data-flow networks. Precisely, given a system with several input and output flow...
Marc Pouzet, Pascal Raymond
RSP
1999
IEEE
128views Control Systems» more  RSP 1999»
14 years 4 days ago
3-D Floorplanning: Simulated Annealing and Greedy Placement Methods for Reconfigurable Computing Systems
The advances in the programmable hardware has lead to new architectures where the hardware can be dynamically adapted to the application to gain better performance. There are stil...
Kia Bazargan, Ryan Kastner, Majid Sarrafzadeh
KBSE
2009
IEEE
14 years 2 months ago
Let the Ants Deploy Your Software - An ACO Based Deployment Optimisation Strategy
Abstract—Decisions regarding the mapping of software components to hardware nodes affect the quality of the resulting system. Making these decisions is hard when considering the ...
Aldeida Aleti, Lars Grunske, Indika Meedeniya, Ire...
PDPTA
2007
13 years 9 months ago
Software Support for Non-Numerical Computing on Multi-Core Chips
- Multi-core chips present a new computing environment that can benefit from software support for non-numerical applications. Heterogeneous cores will allow efficient sophisticated...
Jerry Potter, Howard Jay Siegel