Sciweavers

1234 search results - page 143 / 247
» A Scheduling and Pipelining Algorithm for Hardware Software ...
Sort
View
SOSP
1989
ACM
13 years 9 months ago
Threads and Input/Output in the Synthesis Kernel
The Synthesis operating system kernel combines several techniques to provide high performa.nce, incl1iding kernel code synthesis, fine-gra.in scheduling. and optimistic sylicllrol...
Henry Massalin, Calton Pu
SIGMETRICS
2004
ACM
206views Hardware» more  SIGMETRICS 2004»
14 years 1 months ago
Performance aware tasking for environmentally powered sensor networks
The use of environmental energy is now emerging as a feasible energy source for embedded and wireless computing systems such as sensor networks where manual recharging or replacem...
Aman Kansal, Dunny Potter, Mani B. Srivastava
MICRO
1997
IEEE
116views Hardware» more  MICRO 1997»
14 years 1 days ago
Tuning Compiler Optimizations for Simultaneous Multithreading
Compiler optimizations are often driven by specific assumptions about the underlying architecture and implementation of the target machine. For example, when targeting shared-mem...
Jack L. Lo, Susan J. Eggers, Henry M. Levy, Sujay ...
CODES
2006
IEEE
14 years 1 months ago
Bounded arbitration algorithm for QoS-supported on-chip communication
Time-critical multi-processor systems require guaranteed services in terms of throughput, bandwidth etc. in order to comply to hard real-time constraints. However, guaranteedservi...
Mohammad Abdullah Al Faruque, Gereon Weiss, Jö...
ICPPW
2006
IEEE
14 years 1 months ago
Retargeting Image-Processing Algorithms to Varying Processor Grain Sizes
Embedded computing architectures can be designed to meet a variety of application specific requirements. However, optimized hardware can require compiler support to realize the po...
Sam Sander, Linda M. Wills