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» A Self-Tuning Configurable Cache
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GLVLSI
2008
IEEE
137views VLSI» more  GLVLSI 2008»
14 years 1 months ago
Phase-based cache reconfiguration for a highly-configurable two-level cache hierarchy
Phase-based tuning methodologies specialize system parameters for each application phase of execution. Parameters are varied during execution, as opposed to remaining fixed as in ...
Ann Gordon-Ross, Jeremy Lau, Brad Calder
PVLDB
2008
197views more  PVLDB 2008»
13 years 6 months ago
Dynamic partitioning of the cache hierarchy in shared data centers
Due to the imperative need to reduce the management costs of large data centers, operators multiplex several concurrent database applications on a server farm connected to shared ...
Gokul Soundararajan, Jin Chen, Mohamed A. Sharaf, ...
IFL
2000
Springer
13 years 10 months ago
Improving Cache Effectiveness through Array Data Layout Manipulation in SAC
Sac is a functional array processing language particularly designed with numerical applications in mind. In this field the runtime performance of programs critically depends on the...
Clemens Grelck
TCAD
2002
86views more  TCAD 2002»
13 years 6 months ago
Platune: a tuning framework for system-on-a-chip platforms
System-on-a-chip (SOC) platform manufacturers are increasingly adding configurable features that provide power and performance flexibility in order to increase a platform's ap...
Tony Givargis, Frank Vahid
FCCM
2000
IEEE
133views VLSI» more  FCCM 2000»
13 years 11 months ago
Configuration Caching Management Techniques for Reconfigurable Computing
Although run-time reconfigurable systems have been shown to achieve very high performance, the speedups over traditional microprocessor systems are limited by the cost of configur...
Zhiyuan Li, Katherine Compton, Scott Hauck