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» A Single-Path Chip-Multiprocessor System
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DEBS
2009
ACM
14 years 2 months ago
Parallel event processing for content-based publish/subscribe systems
Event processing systems are a promising technology for enterprise-scale applications. However, achieving scalability yet maintaining high performance is a challenging problem. Th...
Amer Farroukh, Elias Ferzli, Naweed Tajuddin, Hans...
SAMOS
2010
Springer
13 years 5 months ago
Interleaving granularity on high bandwidth memory architecture for CMPs
—Memory bandwidth has always been a critical factor for the performance of many data intensive applications. The increasing processor performance, and the advert of single chip m...
Felipe Cabarcas, Alejandro Rico, Yoav Etsion, Alex...
CSC
2010
13 years 5 months ago
An Evaluation of Parallel Knapsack Algorithms on Multicore Architectures
Emergence of chip multiprocessor systems has dramatically increased the performance potential of computer systems. Since the amount of exploited parallelism is directly influenced ...
Hammad Rashid, Clara Novoa, Apan Qasem
IPPS
2006
IEEE
14 years 1 months ago
Exploiting unbalanced thread scheduling for energy and performance on a CMP of SMT processors
This paper explores thread scheduling on an increasingly popular architecture: chip multiprocessors with simultaneous multithreading cores. Conventional multiprocessor scheduling,...
M. De Vuyst, Rakesh Kumar, Dean M. Tullsen
DAMON
2006
Springer
13 years 11 months ago
Realizing parallelism in database operations: insights from a massively multithreaded architecture
A new trend in processor design is increased on-chip support for multithreading in the form of both chip multiprocessors and simultaneous multithreading. Recent research in databa...
John Cieslewicz, Jonathan W. Berry, Bruce Hendrick...