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DAC
2000
ACM
14 years 8 months ago
Depth optimal incremental mapping for field programmable gate arrays
In this paper, we study the incremental t echnology mapping problem for lookup-table (LUT) based Field Programmable Gate Arrays (FPGAs) under incremental changes. Given a gate-lev...
Jason Cong, Hui Huang
FPGA
2006
ACM
111views FPGA» more  FPGA 2006»
13 years 11 months ago
FPGA clock network architecture: flexibility vs. area and power
This paper examines the tradeoffs between flexibility, area, and power dissipation of programmable clock networks for FieldProgrammable Gate Arrays (FPGA's). The paper begins...
Julien Lamoureux, Steven J. E. Wilton
VLSISP
2008
145views more  VLSISP 2008»
13 years 7 months ago
Area, Delay, and Power Characteristics of Standard-Cell Implementations of the AES S-Box
Cryptographic substitution boxes (S-boxes) are an integral part of modern block ciphers like the Advanced Encryption Standard (AES). There exists a rich literature devoted to the ...
Stefan Tillich, Martin Feldhofer, Thomas Popp, Joh...
ICDE
2001
IEEE
129views Database» more  ICDE 2001»
14 years 9 months ago
High-Performance, Space-Efficient, Automated Object Locking
The paper studies the impact of several lock manager designs on the overhead imposed to a persistent programming language by automated object locking. Our study reveals that a loc...
Grzegorz Czajkowski, Laurent Daynès
CSCW
2004
ACM
14 years 1 months ago
Action as language in a shared visual space
A shared visual workspace allows multiple people to see similar views of objects and environments. Prior empirical literature demonstrates that visual information helps collaborat...
Darren Gergle, Robert E. Kraut, Susan R. Fussell