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» A Survey of Automated Techniques for Formal Software Verific...
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SAC
2010
ACM
13 years 5 months ago
A machine-checked soundness proof for an efficient verification condition generator
Verification conditions (VCs) are logical formulae whose validity implies the correctness of a program with respect to a specification. The technique of checking software properti...
Frédéric Vogels, Bart Jacobs 0002, F...
TSE
2012
11 years 10 months ago
Automated Abstractions for Contract Validation
d Abstractions for Contract Validation Guido de Caso, Víctor Braberman, Diego Garbervetsky and Sebastián Uchitel —Pre/post condition-based specifications are common-place in a...
Guido de Caso, Víctor A. Braberman, Diego G...
SIGSOFT
2003
ACM
14 years 8 months ago
Ontology support for web service processes
Web Services are software services that can be advertised by providers and deployed by customers using Web technologies. This concept is currently carried further to address Web s...
Claus Pahl, Michael Casey
ENTCS
2008
108views more  ENTCS 2008»
13 years 7 months ago
Modelling Dynamic Software Architectures using Typed Graph Grammars
Several recent research efforts have focused on the dynamic aspects of software architectures providing suitable models and techniques for handling the run-time modification of th...
Roberto Bruni, Antonio Bucchiarone, Stefania Gnesi...
EMSOFT
2007
Springer
13 years 11 months ago
Verification of device drivers and intelligent controllers: a case study
The soundness of device drivers generally cannot be verified in isolation, but has to take into account the reactions of the hardware devices. In critical embedded systems, interf...
David Monniaux