294 search results - page 49 / 59 » A System Level Resource Estimation Tool for FPGAs |
204
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DSD
2003
IEEE
16 years 23 days ago
2003
IEEE
Network on Chip (NoC) is a new paradigm for designing core based System on Chip which supports high degree of reusability and is scalable. In this paper we describe an efficient t...
255
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MIR
2004
ACM
16 years 27 days ago
2004
ACM
We present in this paper a CBIR system for use in a psychological study of the relationship between human movement and Dyslexia. The system allows access to up to 500 hours of vid...
214
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TOMS
1998
15 years 7 months ago
1998
This paper presents the software architecture and implementation of the problem solving environment (PSE) PELLPACK for modeling physical objects described by partial differential ...
291
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BICA
2010
15 years 2 months ago
2010
In this position paper we argue that BICA must simultaneously be compatible with the explanation of human cognition and support the human design of artificial cognitive systems. Mo...
216
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BROADNETS
2004
IEEE
15 years 11 months ago
2004
IEEE
Channel-aware scheduling and link adaptation (LA) methods are widely considered to be crucial for realizing high data rates in wireless networks. Multi-carrier systems that spread...