209 search results - page 13 / 42 » A Systematic Approach for Designing Testable VLSI Circuits |
SBCCI
2004
ACM
14 years 1 months ago
2004
ACM
This paper presents an approach for simulation of mixed analog-digital CMOS integrated circuits, aiming at estimating crosstalk effects due to current pulses drawn from voltage s...
DFT
2008
IEEE
14 years 2 months ago
2008
IEEE
VLSI circuits in nanometer VLSI technology experience significant aging effects, which are embodied by performance degradation over operation time. Although this degradation can b...
TCAD
2011
13 years 2 months ago
2011
—Pre-bond testing of 3-D stacked integrated circuits (ICs) involves testing each individual die before bonding. The overall yield of 3-D ICs improves with pre-bond testability be...
TSP
2008
13 years 7 months ago
2008
This paper presents a systematic high-speed VLSI implementation of the discrete wavelet transform (DWT) based on hardware-efficient parallel FIR filter structures. High-speed 2-D D...
VLSID
1999
IEEE
14 years 4 hour ago
1999
IEEE
To minimize the time to market and cost of new sub 0.25um process technologies and products, PDF Solutions, Inc., has developed a new comprehensive approach based on the use of pr...