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» A Time Predictable Instruction Cache for a Java Processor
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IEEEINTERACT
2003
IEEE
14 years 1 months ago
Compiler-Directed Resource Management for Active Code Regions
Recent studies on program execution behavior reveal that a large amount of execution time is spent in small frequently executed regions of code. Whereas adaptive cache management ...
Ravikrishnan Sree, Alex Settle, Ian Bratt, Daniel ...
WISES
2003
13 years 10 months ago
Using a Java Optimized Processor in a Real World Application
— Java, a popular programming language on desktop systems, is rarely used in embedded systems. Some features of Java, like thread support in the language, could greatly simplify ...
Martin Schoeberl
WORDS
2002
IEEE
14 years 1 months ago
Writing Temporally Predictable Code
The Worst-Case Execution-Time Analysis (WCET Analysis) of program code that is to be executed on modern processors is a highly complex task. First, it involves path analysis, to i...
Peter P. Puschner, Alan Burns
DAGSTUHL
2004
13 years 10 months ago
Requirements for and Design of a Processor with Predictable Timing
Abstract. This paper introduces a set of design principles that aim to make processor architectures amenable to static timing analysis. Based on these principles, we give a design ...
Christoph Berg, Jakob Engblom, Reinhard Wilhelm
ISPASS
2010
IEEE
14 years 3 months ago
Cache contention and application performance prediction for multi-core systems
—The ongoing move to chip multiprocessors (CMPs) permits greater sharing of last-level cache by processor cores but this sharing aggravates the cache contention problem, potentia...
Chi Xu, Xi Chen, Robert P. Dick, Zhuoqing Morley M...