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ISPD
2012
ACM
288views Hardware» more  ISPD 2012»
12 years 5 months ago
Construction of realistic gate sizing benchmarks with known optimal solutions
Gate sizing in VLSI design is a widely-used method for power or area recovery subject to timing constraints. Several previous works have proposed gate sizing heuristics for power ...
Andrew B. Kahng, Seokhyeong Kang
CVPR
2007
IEEE
15 years 8 days ago
Biased Manifold Embedding: A Framework for Person-Independent Head Pose Estimation
The estimation of head pose angle from face images is an integral component of face recognition systems, human computer interfaces and other human-centered computing applications....
Vineeth Nallure Balasubramanian, Jieping Ye, Sethu...
CVPR
2007
IEEE
15 years 8 days ago
Towards Scalable Representations of Object Categories: Learning a Hierarchy of Parts
This paper proposes a novel approach to constructing a hierarchical representation of visual input that aims to enable recognition and detection of a large number of object catego...
Sanja Fidler, Ales Leonardis
CVPR
2008
IEEE
15 years 8 days ago
Discriminative learning of visual words for 3D human pose estimation
This paper addresses the problem of recovering 3D human pose from a single monocular image, using a discriminative bag-of-words approach. In previous work, the visual words are le...
Huazhong Ning, Wei Xu, Yihong Gong, Thomas S. Huan...
ICCV
2007
IEEE
15 years 6 days ago
Supervised Learning of Image Restoration with Convolutional Networks
Convolutional networks have achieved a great deal of success in high-level vision problems such as object recognition. Here we show that they can also be used as a general method ...
Viren Jain, Joseph F. Murray, Fabian Roth, Sriniva...
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